Hardware-Software Co-Reliability in Field Reconfigurable Multi-Processor-Memory Systems

Authors:
M. Choi;Naphill Park;Fabrizio Lombardi
Affiliations:
-;-;-
Venue:
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Year:
2002

Citing 6
Cited 0

Interval Availability Analysis Using Denumerable Markov Processes: Application to Multiprocessor Subject to Breakdowns and Repair

IEEE Transactions on Computers - Special issue on fault-tolerant computing
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System

IEEE Transactions on Computers
Analysis of Noncoherent Systems and an Architecture for the Computation of the System Reliability

IEEE Transactions on Computers
Efficient Implementation Techniques for Gracefully Degradable Multiprocessor Systems

IEEE Transactions on Computers
Low Overhead Multiprocessor Allocation Strategies Exploiting System Spare Capacity for Fault Detection and Location

IEEE Transactions on Computers
On Dependability Evaluation of Mesh-Connected Processors

IEEE Transactions on Computers

Quantified Score

Hi-index	0.00

Visualization

Abstract

Advances in field reconfigurable technology have made possible the design and implementation of highly flexible parallel multi-processor-memory systems; system reliability is often an important measure of these systems because a degradation of an individual module can unacceptably impair the reliable operation of these systems. System reliability is mainly determined by the hardware (HW) configurations (requested by the software, SW) and the process of field reconfiguration/repair (by utilizing unused processors and memory modules as spares). This is referred to as HW/SW Co-reliability. System configurations are categorized in terms of parallel processor size and processor/ memory intensity as affecting the HW/SW Co-reliability. Their characteristics are discussed. A model for HW/SW Co-reliability based on a combinatorial analysis for field reconfigurable multiprocessor-memory systems is then proposed and further validated by extensive parametric simulations, thus allowing the design and implementation of highly reliable field-reconfigurable multiprocessor-memory systems.