The instruction systolic array, a parallel architecture for VLSI
Integration, the VLSI Journal
Given's rotation on an instruction array.
on Parcella '88: Fourth International Workshop on Parallel Processing by Cellular Automata and Arrays
HPCN Europe 1994 Proceedings of the nternational Conference and Exhibition on High-Performance Computing and Networking Volume II: Networking and Tools
Euro-Par '98 Proceedings of the 4th International Euro-Par Conference on Parallel Processing
A Parallel Accelerator Architecture for Multimedia Video Compression
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
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Molecular biologists frequently compare an unknown protein sequence with a set of other known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithms exist for the problem, the required scanning time is still very high, and because of the exponential database growth finding fast solutions is of highest importance to research in this area. In this paper we present a new approach to biosequence database scanning on the instruction systolic array to gain high performance at low cost. To derive an efficient mapping onto this architecture, we designed a fine-grained parallel sequence comparison algorithm. This results in an implementation with significant runtime savings on Systola 1024, a parallel computer of this particular architecture.