Combining Methods for the Livelock Analysis of a Fault-Tolerant System

  • Authors:
  • Bettina Buth;Jan Peleska;Hui Shi

  • Affiliations:
  • -;-;-

  • Venue:
  • AMAST '98 Proceedings of the 7th International Conference on Algebraic Methodology and Software Technology
  • Year:
  • 1999

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Abstract

This article presents experiences gained from the verification of communication properties of a large-scale real-world embedded system by means of formal methods. This industrial verification project was performed for a fault-tolerant system designed and implemented by Daimler-Benz Aerospace for the International Space Station ISS and focused essentially on deadlock and livelock analysis. The approach is based on CSP specifications and the model-checking tool FDR. The tasks are split into manageable subtasks by applying abstraction techniques for restricting the specifications to the essential communication behavior, modularization according to the process structure, and a set of generic theories developed for the application.