Guide to Neural Computing Applications
Guide to Neural Computing Applications
Learning on Silicon: Adaptive VLSI Neural Systems
Learning on Silicon: Adaptive VLSI Neural Systems
Analog VLSI Implementation of Artificial Neural Networks with Supervised On-Chip Learning
Analog Integrated Circuits and Signal Processing
A Fast Stochastic Error-Descent Algorithm for Supervised Learning and Optimization
Advances in Neural Information Processing Systems 5, [NIPS Conference]
A Parallel Gradient Descent Method for Learning in Analog VLSI Neural Networks
Advances in Neural Information Processing Systems 5, [NIPS Conference]
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Supervised learning algorithms (i.e. Back Propagation algorithms, BP) are reliable and widely adopted for real world applications. Among supervised algorithms, stochastic ones (e.g. Weight Perturbation algorithms, WP) exhibit analog VLSI hardware friendly features. Though, they have not been validated on meaningful applications. This paper presents the results of a thorough experimental validation of the parallel WP learning algorithm on the recognition of handwritten characters. We adopted a local and adaptive learning rate management to increase the efficiency. Our results demonstrate that the performance of the WP algorithm are comparable to the BP ones except that the network complexity (i.e. the number of hidden neurons) is fairly lower. The average number of iterations to reach convergence is higher than in the BP case, but this cannot be considered a heavy drawback in view of the analog parallel on-chip implementation of the learning algorithm.