Parallel distributed processing: explorations in the microstructure of cognition, vol. 2: psychological and biological models
Analog VLSI and neural systems
Analog VLSI and neural systems
Self-organization and associative memory: 3rd edition
Self-organization and associative memory: 3rd edition
A lower-power CMOS circuit which emulates temporal electrical properties of neurons
Advances in neural information processing systems 1
Introduction to the theory of neural computation
Introduction to the theory of neural computation
IEEE Transactions on Computers - Special issue on artificial neural networks
A High-Speed Analog Neural Processor
IEEE Micro
Analog VLSI signal processing: why, where, and how?
Journal of VLSI Signal Processing Systems - Joint special issue on Analog VLSI computation; also see Analog Integrated Circuits Signal Process., Vol. 6, No. 1
Software Magazine
Back-propagation learning algorithms for analog VLSI implementation
Proceeding of an international workshop on VLSI for neural networks and artificial intelligence
Translinear circuits in subthreshold MOS
Analog Integrated Circuits and Signal Processing - Special issue: translinear circuits
An experimental analog VLSI neural network with on-chip back-propagation learning
Analog Integrated Circuits and Signal Processing
An analog feed-forward neural network with on-chip learning
Analog Integrated Circuits and Signal Processing - Special issue: selected articles from the 1994 NORCHIP seminar
Analog versus digital: extrapolating from electronics to neurobiology
Neural Computation
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Mixed-Mode Programmable and Scalable Architecture for On-Chip Learning
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Analog Hardware Implementation of Continuous-Time Adaptive Filter Structures
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Neural Networks: A Comprehensive Foundation
Neural Networks: A Comprehensive Foundation
Guide to Neural Computing Applications
Guide to Neural Computing Applications
Feed-Forward Neural Networks: Vector Decomposition Analysis, Modelling, and Analog Implementation
Feed-Forward Neural Networks: Vector Decomposition Analysis, Modelling, and Analog Implementation
Analog VLSI Integration of Massive Parallel Processing Systems
Analog VLSI Integration of Massive Parallel Processing Systems
Learning on Silicon: Adaptive VLSI Neural Systems
Learning on Silicon: Adaptive VLSI Neural Systems
Neural Information Processing and VLSI
Neural Information Processing and VLSI
Analogue Neural VLSI: A Pulse Stream Approach
Analogue Neural VLSI: A Pulse Stream Approach
Neural Networks for Optimization and Signal Processing
Neural Networks for Optimization and Signal Processing
Analysis and Design of Integrated Circuits
Analysis and Design of Integrated Circuits
Analog Integrated Circuits and Signal Processing
Present and Future Industrial Applications of Bio-Inspired VLSI Systems
Analog Integrated Circuits and Signal Processing
An On-Chip BP Learning Neural Network with Ideal Neuron Characteristics and Learning Rate Adaptation
Analog Integrated Circuits and Signal Processing
Pulse Arithmetic in VLSI Neural Networks
IEEE Micro
Array-Based Analog Computation
IEEE Micro
IEEE Micro
Digital Signal Processor Trends
IEEE Micro
A Fast Stochastic Error-Descent Algorithm for Supervised Learning and Optimization
Advances in Neural Information Processing Systems 5, [NIPS Conference]
A Parallel Gradient Descent Method for Learning in Analog VLSI Neural Networks
Advances in Neural Information Processing Systems 5, [NIPS Conference]
Array-based analog computation: principles, advantages and limitations
MICRONEURO '96 Proceedings of the 5th International Conference on Microelectronics for Neural Networks and Fuzzy Systems
IJCNN '00 Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 2 - Volume 2
An analog VLSI recurrent neural network learning a continuous-time trajectory
IEEE Transactions on Neural Networks
Toward a general-purpose analog VLSI neural network with on-chip learning
IEEE Transactions on Neural Networks
Worst case analysis of weight inaccuracy effects in multilayer perceptrons
IEEE Transactions on Neural Networks
K-winner machines for pattern classification
IEEE Transactions on Neural Networks
Forward- and backpropagation in a silicon dendrite
IEEE Transactions on Neural Networks
A neuromorphic VLSI device for implementing 2D selective attention systems
IEEE Transactions on Neural Networks
Tolerance to analog hardware of on-chip learning in backpropagation networks
IEEE Transactions on Neural Networks
ICANN '02 Proceedings of the International Conference on Artificial Neural Networks
Smart sensing with adaptive analog circuits
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
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Analog VLSI on-chip learning Neural Networks represent a mature technology for a large number of applications involving industrial as well as consumer appliances. This is particularly the case when low power consumption, small size and/or very high speed are required. This approach exploits the computational features of Neural Networks, the implementation efficiency of analog VLSI circuits and the adaptation capabilities of the on-chip learning feedback schema.Many experimental chips and microelectronic implementations have been reported in the literature based on the research carried out over the last few years by several research groups. The author presents and discusses the motivations, the system and circuit issues, the design methodology as well as the limitations of this kind of approach. Attention is focused on supervised learning algorithms because of their reliability and popularity within the neural network research community. In particular, the Back Propagation and Weight Perturbation learning algorithms are introduced and reviewed with respect to their analog VLSI implementation.Finally, the author also reviews and compares the main results reported in the literature, highlighting the efficiency and the reliability of the on-chip implementation of these algorithms.