Biologically-Inspired On-Chip Learning in Pulsed Neural Networks
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Mixed-Mode Programmable and Scalable Architecture for On-Chip Learning
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Design of a Temporal Learning Chip for Signal Generation and Classification
Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Analog VLSI hardware implementation of a supervised learning algorithm
Hardware implementation of intelligent systems
Analog VLSI Stochastic Perturbative Learning Architectures
Analog Integrated Circuits and Signal Processing
An On-Chip BP Learning Neural Network with Ideal Neuron Characteristics and Learning Rate Adaptation
Analog Integrated Circuits and Signal Processing
Analog VLSI Implementation of Artificial Neural Networks with Supervised On-Chip Learning
Analog Integrated Circuits and Signal Processing
Bit-serial bidirectional A/D/A conversio
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Circuits for On-Chip Learning in Neuro-Fuzzy Controllers
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
An Experimental Analog CMOS Self-Learning Chip
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
A feed-forward time-multiplexed neural network with mixed-signal neuron-synapse arrays
Microelectronic Engineering
High-speed, model-free adaptive control using parallel synchronous detection
Proceedings of the 20th annual conference on Integrated circuits and systems design
Journal of VLSI Signal Processing Systems
Current-Mode Computation with Noise in a Scalable and Programmable Probabilistic Neural VLSI System
ICANN '09 Proceedings of the 19th International Conference on Artificial Neural Networks: Part I
Learning scheme for complex neural networks using simultaneous perturbation
ICANN'11 Proceedings of the 21st international conference on Artificial neural networks - Volume Part II
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Real-time algorithms for gradient descent supervised learning in recurrent dynamical neural networks fail to support scalable VLSI implementation, due to their complexity which grows sharply with the network dimension. We present an alternative implementation in analog VLSI, which employs a stochastic perturbation algorithm to observe the gradient of the error index directly on the network in random directions of the parameter space, thereby avoiding the tedious task of deriving the gradient from an explicit model of the network dynamics. The network contains six fully recurrent neurons with continuous-time dynamics, providing 42 free parameters which comprise connection strengths and thresholds. The chip implementing the network includes local provisions supporting both the learning and storage of the parameters, integrated in a scalable architecture which can be readily expanded for applications of learning recurrent dynamical networks requiring larger dimensionality. We describe and characterize the functional elements comprising the implemented recurrent network and integrated learning system, and include experimental results obtained from training the network to represent a quadrature-phase oscillator