An Experimental Analog CMOS Self-Learning Chip

  • Authors:
  • G. M. Bo;D. D. Caviglia;H. Chiblè;M. Valle

  • Affiliations:
  • -;-;-;-

  • Venue:
  • MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
  • Year:
  • 1999

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Abstract

The analog VLSI implementation of an on-chip learning neural network is discussed in this paper. The Multi Layer Perceptron paradigm and Back Propagation learning rule have been mapped onto analog circuits. A local learning rate adaptation rule has been also considered to improve the training performance (i.e., fast convergence speed). Experimental results confirm the chip functionality and the soundness of our approach.