Analog Integrated Circuits and Signal Processing - Special issue on Learning on Silicon
Analog VLSI Implementation of Artificial Neural Networks with Supervised On-Chip Learning
Analog Integrated Circuits and Signal Processing
A feed-forward time-multiplexed neural network with mixed-signal neuron-synapse arrays
Microelectronic Engineering
CMOS implementation of an artificial neuron training on logical threshold functions
WSEAS Transactions on Circuits and Systems
Compact yet efficient hardware implementation of artificial neural networks with customized topology
Expert Systems with Applications: An International Journal
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This paper describes elements necessary for a general-purpose low-cost very large scale integration (VLSI) neural network. By choosing a learning algorithm that is tolerant of analog nonidealities, the promise of high-density analog VLSI is realized. A 64-synapse, 8-neuron proof-of-concept chip is described. The synapse, which occupies only 4900 μm2 in a 2-μm technology, includes a hybrid of nonvolatile and dynamic weight storage that provides fast and accurate learning as well as reliable long-term storage with no refreshing. The architecture is user-configurable in any one-hidden-layer topology. The user-interface is fully microprocessor compatible. Learning is accomplished with minimal external support; the user need only present inputs, targets, and a clock. Learning is fast and reliable. The chip solves four-bit parity in an average of 680 ms and is successful in about 96% of the trials