Communicating sequential processes
Communicating sequential processes
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Towards action-refinement in process algebras
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Verifying temporal properties of systems
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FORTE/PSTV 2000 Proceedings of the FIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE XIII) and Protocol Specification, Testing and Verification (PSTV XX)
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ICALP '91 Proceedings of the 18th International Colloquium on Automata, Languages and Programming
Action Refinement and Property Inheritance in Systems of Sequential Agents
CONCUR '96 Proceedings of the 7th International Conference on Concurrency Theory
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FoSSaCS '02 Proceedings of the 5th International Conference on Foundations of Software Science and Computation Structures
Fully abstract models for a process language with refinement
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STACS'99 Proceedings of the 16th annual conference on Theoretical aspects of computer science
On hierarchically developing reactive systems
Information and Computation
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Action refinement provides a mechanism to design a complex reactive system hierarchically. This paper is devoted to action refinement from a logical point of view, and to combining the hierarchical implementation of a complex system with the hierarchical specification of the system in order to verify it in an easy way. To this end, we use a TCSP-like language with an action refinement operator as a modeling language, and an extension of the modal 碌-calculus, called FLC (Fixpoint Logic with Chop) [18], as a specification language. Specifications in FLC can be refined via a mapping that takes as arguments an abstract specification 驴 for the process P, an action a of P and a specification 驴 for the process Q that may refine a and produces a refined specification. We prove under some syntactical conditions: if Q 驴 驴 then P 驴 驴 iff P[a 驴 Q] satisfies the refined specification. Therefore our approach supports 'a priori' verification in system design and can be used to decrease substantially the complexity of verification.