Thread Placement on the Intel Paragon: Modeling and Experimentation

Authors:
Evgenia Smirni;C. A. Childers;Emilia Rosti;Lawrence W. Dowdy
Affiliations:
-;-;-;-
Venue:
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Year:
1995

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Abstract

In multicomputer architectures where communication latency is distance independent, thread placement is expected to have a limited impact on an application's performance. In this paper, the impact of thread placement on application performance is demonstrated on a wormhole routed multicomputer, the Intel Paragon. A communication intensive synthetic workload is used to "stress test" the effects of contention on communication latency induced by thread placement. It is shown by means of experimentation and modeling that appropriate thread placement patterns minimizing contention in the system's interconnection network improve performance. The analytic model and the experimental observations are in good agreement.