Optimal Systolic Design for the Transitive Closure and the Shortest Path Problems
IEEE Transactions on Computers
Synthesis of a new systolic architecture for the algebraic path problem
Science of Computer Programming
An improved systolic algorithm for the algebraic path problem
Integration, the VLSI Journal - Special issue on algorithms and architectures
A Modular Systolic Linearization of the Warshall-Floyd Algorithm
IEEE Transactions on Parallel and Distributed Systems
A Family of Efficient Regular Arrays for Algebraic Path Problem
IEEE Transactions on Computers
Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
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We derive an efficient linear SIMD architecture for the algebraic path problem (APP). For a graph with n nodes, our array has n processors, each with 3n memory cells, and computes the result in 3n2 - 2n steps. Our array is ideally suited for VLSI, since the controls is simple and the memory can be implemented as fifos. I/O is straightforward, since the array is linear. It can be trivially adapted to run in multiple passes, and moreover, this version improves the work efficiency. For any constant 驴, the running time on n/驴 processors is no more than (驴+2)n2. The work is no more than (1+ 2/驴)n3 and can be made as close to n3 as desired by increasing 驴.