Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
The transformation schema: An extension of the data flow diagram to represent control and timing
IEEE Transactions on Software Engineering
The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Requirements Specification for Process-Control Systems
IEEE Transactions on Software Engineering
ACM Transactions on Programming Languages and Systems (TOPLAS)
The STATEMATE semantics of statecharts
ACM Transactions on Software Engineering and Methodology (TOSEM)
Model checking large software specifications
SIGSOFT '96 Proceedings of the 4th ACM SIGSOFT symposium on Foundations of software engineering
Symbolic Model Checking
Using a Symbolic Model Checker for Verify Safety Properties in SA/RT Models
Proceedings of the 5th European Software Engineering Conference
Hierarchical Automata as Model for Statecharts
ASIAN '97 Proceedings of the Third Asian Computing Science Conference on Advances in Computing Science
PSI '99 Proceedings of the Third International Andrei Ershov Memorial Conference on Perspectives of System Informatics
A formal approach to reactive systems software: a telecommunications application in ESTEREL
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
A Model Checker for Statecharts
A Model Checker for Statecharts
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Integration of non formal methods, notations and tools with formal ones is a promising way of linking scientific results to the daily work of practitioners. In this paper, we present a formal notation based in a synchronous reactive execution semantics (Synchronous Reactive System) for graphical specifications (SA/RT models). We use the Synchronous Reactive System as intermediate format to formally verify graphical specifications using the SMV model checker. We deal with the state space explosion problem using modular verification.