On deadlock detection in systems of communicating finite state machines
Computers and Artificial Intelligence
Data flow analysis of communicating finite state machines
ACM Transactions on Programming Languages and Systems (TOPLAS)
On Communicating Finite-State Machines
Journal of the ACM (JACM)
Verification of a Radio-based signaling system using the STATEMATE verification environment
Formal Methods in System Design
Protocol Description and Analysis Based on a State Transition Model with Channel Expressions
Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
ICALP '97 Proceedings of the 24th International Colloquium on Automata, Languages and Programming
Channel Representations in Protocol Verification
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
The Power of QDDs (Extended Abstract)
SAS '97 Proceedings of the 4th International Symposium on Static Analysis
On-the-Fly Analysis of Systems with Unbounded, Lossy FIFO Channels
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Automatic Temporal Verification of Buffer Systems
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Live and let die: LSC based verification of UML models
Science of Computer Programming - Formal methods for components and objects pragmatic aspects and applications
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This paper concerns analyzing UML based models of distributed real time systems involving multiple active agents. In order to avoid the time-penalties incurred by distributed execution of synchronous operation calls, it is typically recommended to restrict inter-task communication to event-based communication through unbounded FIFO buffers. This means that such systems potentially have an infinite number of states, making them out of reach for analysis techniques intended for finite-state systems. We present a symbolic analysis technique of such systems, which can be tuned to give a finite, possibly inexact representation of the state-space. The central idea is to eliminate FIFO buffers completely, and represent their contents implicitly, by their effect on the receiving agent. We propose a natural class of protocols which we call mode separated, for which this representation is both finite and exact. This result has impact on both responsiveness and predictability of end-to-end latencies, as well for the protocol verification, enabling automatic verification methods to be applied.