The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Better verification through symmetry
Formal Methods in System Design - Special issue on symmetry in automatic verification
Formal Methods in System Design - Special issue on symmetry in automatic verification
Verifying Systems with Replicated Components in Mur&b.phiv;
Formal Methods in System Design
Model checking
A methodology for hardware verification using compositional model checking
Science of Computer Programming - Special issue on mathematics of program construction
LSCs: Breathing Life into Message Sequence Charts
Formal Methods in System Design
Multiple instances and symbolic variables in executable sequence charts
OOPSLA '02 Proceedings of the 17th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Formal Verification of UML Statecharts with Real-Time Extensions
FASE '02 Proceedings of the 5th International Conference on Fundamental Approaches to Software Engineering
FASE '02 Proceedings of the 5th International Conference on Fundamental Approaches to Software Engineering
A Language Framework for Expressing Checkable Properties of Dynamic Software
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
Symmetry Reduction Criteria for Software Model Checking
Proceedings of the 9th International SPIN Workshop on Model Checking of Software
An Automata Based Interpretation of Live Sequence Charts
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Model Checking - Timed UML State Machines and Collaborations
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Eliminating Queues from RT UML Model Representations
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Verification of an Implementation of Tomasulo's Algorithm by Compositional Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
VIATRA " Visual Automated Transformations for Formal Verification and Validation of UML Models
Proceedings of the 17th IEEE international conference on Automated software engineering
Come, Let's Play: Scenario-Based Programming Using LSC's and the Play-Engine
Come, Let's Play: Scenario-Based Programming Using LSC's and the Play-Engine
Model Checking for an Executable Subset of UML
Proceedings of the 16th IEEE international conference on Automated software engineering
Exploiting Heap Symmetries in Explicit-State Model Checking of Software
Proceedings of the 16th IEEE international conference on Automated software engineering
A discrete-time UML semantics for concurrency and communication in safety-critical applications
Science of Computer Programming - Formal methods for components and objects pragmatic aspects and applications
Verifying temporal heap properties specified via evolution logic
ESOP'03 Proceedings of the 12th European conference on Programming
Formalising UML state machines for model checking
UML'99 Proceedings of the 2nd international conference on The unified modeling language: beyond the standard
Counterexample Guided Spotlight Abstraction Refinement
FORTE '08 Proceedings of the 28th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
LSC Verification for UML Models with Unbounded Creation and Destruction
Electronic Notes in Theoretical Computer Science (ENTCS)
Non-interference properties for data-type reduction of communicating systems
IFM'07 Proceedings of the 6th international conference on Integrated formal methods
Mind the shapes: abstraction refinement via topology invariants
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
On the expressive power of live sequence charts
Program analysis and compilation, theory and practice
Model-checking behavioral programs
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
Experiences in model driven verification of behavior with UML
Monterey'08 Proceedings of the 15th Monterey conference on Foundations of Computer Software: future Trends and Techniques for Development
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This paper addresses the problem of formal verification of UML models in the semantics of Damm and Josko et al. (Science of Computer Programming, this issue). The problem is twofold in that it requires on the one hand a specification language which is rich enough to express properties about entities that are only created during a run of the system and on the other hand a means to abstract the a priori unbounded state space to a finite one which lends itself to treatment by approved finite state methods.As the specification language, the paper proposes to extend Live Sequence Charts as presented by W. Damm and D. Harel [LSCs: breathing life into message sequence charts, Formal Methods in System Design 19 (1) (2001) 121-141] and J. Klose [Live sequence charts: A graphical formalism for the specification of communication behavior, Ph.D. Thesis, Carl von Ossietzky Universität Oldenburg, 2003] by means of dynamically bound instance lines and equips it with a formal semantics w.r.t, the UML domain.For verification, the paper proposes to transfer to the UML domain the methodology of K.L. McMillan [A methodology for hardware verification using compositional model checking, Science of Computer Programming 37 (2000) 279-309], comprising a first step which is based on results of C.N. Ip and D.L. Dill [Better verification through symmetry, Formal Methods in System Design 9 (1-2) (1996) 41-75] about symmetric data-types and for which F. Xie and J.C. Browne [Integrated state space reduction for model checking executable object-oriented software system designs, in: R.-D. Kutsche, H. Weber (Eds.), FASE, Lecture Notes in Computer Science, vol. 2306, Springer, 2002] coined the term "Query Reduction" and, as second step, an abstract interpretation called "data-type reduction" to construct a finite state over-approximation of the original model for each query. The paper also briefly discusses counter-measures against false-negatives occurring in the over-approximation.