Towards Energy-Aware Iteration Space Tiling

Authors:
Mahmut T. Kandemir;Narayanan Vijaykrishnan;Mary Jane Irwin;H. S. Kim
Affiliations:
-;-;-;-
Venue:
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Year:
2000

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Abstract

Iteration space (loop) tiling is a widely used loop-level compiler optimization that can improve performance of array-dominated codes. But, in current designs (in particular in embedded and mobile devices), low energy consumption is becoming as important as performance. Towards understanding the influence of tiling on system energy, in this paper, we investigate energy behavior of tiling.