Crosstalk Measurement Technique for CMOS ICs

Authors:
F. Picot;P. Coll;Daniel Auvergne
Affiliations:
-;-;-
Venue:
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Year:
2002

Citing 3
Cited 0

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Abstract

Signal integrity is of primary concern for designs in submicron processes. Based on the characterization of an industrial driver library in terms of crosstalk-induced noise possibility [1], we present a specific test structure to measure crosstalk signal on interconnect lines. An original implementation is proposed for direct amplitude and pulse width measurement of the crosstalk-induced parasitic signal. A validation is given with an HSPICE simulation of the extracted layout of the structure implemented in a 0.25碌m process.