Reconfigurable transputer systems

  • Authors:

  • C. Jesshope

  • Affiliations:

  • Dept. of Electronics and Computer Science, The University, Southampton, S09 5NH, ENGLAND

  • Venue:
  • C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
  • Year:
  • 1988

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Abstract

This paper introduces the T800 transputer from INMOS, for use as a component in reconfigurable multiple-processor systems. The architecture of such systems will be considered together with the limitations; being static and of fixed valence. Solutions to these limitations can be found in virtualising the networks, but this introduces inefficiencies and the potential for deadlock. The latter can be eliminated by careful design, but the former requires further chip development. Finally the paper will consider programming methodologies and systems for this and other multiple-processor architectures.