Technology mapping of LUT based FPGAs for delay optimisation

  • Authors:
  • Xiaochun Lin;Erik L. Dagless;Aiguo Lu

  • Affiliations:
  • -;-;-

  • Venue:
  • FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
  • Year:
  • 1997

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Abstract