Mapping Loops onto Reconfigurable Architectures

Parallelizing DSP nested loops on reconfigurable architectures using data context switching

Proceedings of the 38th annual Design Automation Conference

MILAN: A Model Based Integrated Simulation Framework for Design of Embedded Systems

OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems

Loop Pipelining and Optimization for Run Time Reconfiguration

IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing

A Compiler Directed Approach to Hiding Configuration Latency in Chameleon Processors

FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications

Dynamic Precision Management for Loop Computations on Reconfigurable Architectures

FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines

On Enforced Convergence of ACO and its Implementation on the Reconfigurable Mesh Architecture Using Size Reduction Tasks

The Journal of Supercomputing

An efficient framework for dynamic reconfiguration of instruction-set customization

CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems