Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic

Authors:
Stephen J. Melnikoff;Steven F. Quigley;Martin J. Russell
Affiliations:
-;-;-
Venue:
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Year:
2001

Citing 1
Cited 1

Reconfigurable Computing for Speech Recognition: Preliminary Findings

FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications

Speech Recognition on an FPGA Using Discrete and Continuous Hidden Markov Models

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

Quantified Score

Hi-index	0.00

Visualization

Abstract

Performing Viterbi decoding for continuous real-time speech recognition is a highly computationally-demanding task, but is one which can take good advantage of a parallel processing architecture. To this end, we describe a system which uses an FPGA for the decoding and a PC for pre- and post-processing, taking advantage of the properties of this kind of programmable logic device, specifically its ability to perform in parallel the large number of additions and comparisons required. We compare the performance of the FPGA decoder to a software equivalent, and discuss issues related to this implementation.