Specification and design of embedded systems
Specification and design of embedded systems
Object-oriented cosynthesis of distributed embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FPGA-Based Prototyping for Product Definition
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
An Object Oriented Programming Approach for Hardware Design
WVLSI '99 Proceedings of the IEEE Computer Society Workshop on VLSI'99
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
Proceedings of the conference on Design, automation and test in Europe
Domain-Specific codesign for automated visual inspection systems
IbPRIA'05 Proceedings of the Second Iberian conference on Pattern Recognition and Image Analysis - Volume Part I
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In this paper, we present a design methodology for high-performance systems based on heterogeneous models. These models contain functions, that are implemented with reconfigurable hardware components. During the stepwise refinement-based design process, a hardware/software system prototype is developed. In the process, we start with a conceptual, implementation independent design at the system-level. Hereby, we employ the commercial Cadence庐 Cierto VCC (Virtual Component Codesign) tool, which allows to model the system with an architectural-, behavioral-, timing-, and performance view. Standard C or C++ serve as modeling language and description of the software-only system and the refinement process. During refinement, selected blocks are evaluated and transformed in stepwise fashion to hardware using Handel-C for subsequent mapping to Xilinx庐 Virtex 1000E FPGAs attached to a standard PC. The hardware implementations on reconfigurable logic are seamlessly integrated into the VCC environment by stub modules, which perform the hardware/software interfacing and communication via shared memory DMA transfers. This paper presents the methodology and illustrates it using an example of a Viterbi encoder/decoder.