Implementation of 3-D Adaptive LUM Smoother in Reconfigurable Hardware

Authors:
Viktor Fischer;Milos Drutarovský;Rastislav Lukac
Affiliations:
-;-;-
Venue:
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Year:
2002

Citing 2
Cited 3

New digit-serial implementations of stack filters

Signal Processing
LUM smoother with smooth control for noisy image sequences

EURASIP Journal on Applied Signal Processing

Effective neural LUM smoother for image smoothing applications

Machine Graphics & Vision International Journal
Least-squares smoothing of 3D digital curves

Real-Time Imaging - Special issue on multi-dimensional image processing
Cost-effective video filtering solution for real-time vision systems

EURASIP Journal on Applied Signal Processing

Quantified Score

Hi-index	0.00

Visualization

Abstract

We present an implementation of a simplified scalable architecture for the efficient realization of 3-D adaptive LUM smoother in the Field Programmable Logic Devices (FPLDs). The proposed filter architecture takes advantages of a combination of recently provided Boolean LUM smoothers with bit-serial realization of stack filters. In order to decrease hardware requirements, we implemented a highly reduced filter structure that is completely modular, scalable and optimized for hardware implementation in FPLD. Introduced simplifications significantly decrease a circuit complexity, however they still provide excellent smoothing capability and provide real-time performance for processing of 3-D signals with sampling frequencies up to 65 Msamples/ second.