An overview of median and stack filtering
Circuits, Systems, and Signal Processing - Special issue: median and morphological filters
New digit-serial implementations of stack filters
Signal Processing
Computer Vision Algorithms on Reconfigurable Logic Arrays
IEEE Transactions on Parallel and Distributed Systems
Color image processing and applications
Color image processing and applications
VLSI architectures for weighted order statistic (WOS) filters
Signal Processing
Nonlinear image processing
LUM smoother with smooth control for noisy image sequences
EURASIP Journal on Applied Signal Processing
Nonlinear Model-Based Image/Video Processing and Analysis
Nonlinear Model-Based Image/Video Processing and Analysis
Computer Vision: A Modern Approach
Computer Vision: A Modern Approach
Implementation of 3-D Adaptive LUM Smoother in Reconfigurable Hardware
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
FPGA Implementation of Median Filter
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
Nonlinear Signal and Image Processing: Theory, Methods, and Applications
Nonlinear Signal and Image Processing: Theory, Methods, and Applications
Bit-serial architecture for rank order and stack filters
Integration, the VLSI Journal
Adaptive Color Image Filtering Based on Center-Weighted Vector Directional Filters
Multidimensional Systems and Signal Processing
Generalized selection weighted vector filters
EURASIP Journal on Applied Signal Processing
Parallel algorithms and VLSI architectures for stack filteringusing Fibonacci p-codes
IEEE Transactions on Signal Processing
Stack filters, stack smoothers, and mirrored thresholddecomposition
IEEE Transactions on Signal Processing
A general weighted median filter structure admitting negativeweights
IEEE Transactions on Signal Processing
Processors for generalized stack filters
IEEE Transactions on Signal Processing
Accurate road following and reconstruction by computer vision
IEEE Transactions on Intelligent Transportation Systems
IEEE Journal on Selected Areas in Communications
Image enhancement using the modified ICM method
IEEE Transactions on Image Processing
Adaptive LMS L-filters for noise suppression in images
IEEE Transactions on Image Processing
A noise-filtering method using a local information measure
IEEE Transactions on Image Processing
Quantitative image quality analysis of a nonlinear spatio-temporal filter
IEEE Transactions on Image Processing
Noise reduction of image sequences using motion compensation and signal decomposition
IEEE Transactions on Image Processing
A motion-compensated spatio-temporal filter for image sequences with signal-dependent noise
IEEE Transactions on Circuits and Systems for Video Technology
Two-dimensional rank-order filter by using max-min sorting network
IEEE Transactions on Circuits and Systems for Video Technology
A new adaptive center weighted median filter for suppressing impulsive noise in images
Information Sciences: an International Journal
Isolating impulsive noise pixels in color images by peer group techniques
Computer Vision and Image Understanding
A low-cost VLSI implementation for efficient removal of impulse noise
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Switching-based filter based on Dempster's combination rule for image processing
Information Sciences: an International Journal
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This paper presents an efficient video filtering scheme and its implementation in a field-programmable logic device (FPLD). Since the proposed nonlinear, spatiotemporal filtering scheme is based on order statistics, its efficient implementation benefits from a bit-serial realization. The utilization of both the spatial and temporal correlation characteristics of the processed video significantly increases the computational demands on this solution, and thus, implementation becomes a significant challenge. Simulation studies reported in this paper indicate that the proposed pipelined bit-serial FPLD filtering solution can achieve speeds of up to 97.6 Mpixels/s and consumes 1700 to 2700 logic cells for the speed-optimized and area-optimized versions, respectively. Thus, the filter area represents only 6.6 to 10.5% of the Altera STRATIX EP1S25 device available on the Altera Stratix DSP evaluation board, which has been used to implement a prototype of the entire real-time vision system. As such, the proposed adaptive video filtering scheme is both practical and attractive for real-time machine vision and surveillance systems as well as conventional video and multimedia applications.