Scan array solution for testing power and testing time

Authors:
Lei Xu;Yihe Sun;Hongyi Chen
Affiliations:
-;-;-
Venue:
Proceedings of the IEEE International Test Conference 2001
Year:
2001

Citing 0
Cited 2

Reduction of SOC test data volume, scan power and testing time using alternating run-length codes

Proceedings of the 39th annual Design Automation Conference
An overlapping scan architecture for reducing both test time and test power by pipelining fault detection

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

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Abstract