A Sweeping Line Approach to Interconnect Testing
IEEE Transactions on Computers
Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
BIST TPG for Combinational Cluster Interconnect Testing at Board Level
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
Using fault sampling to compute I/sub DDQ/ diagnostic test sets
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
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