Cost of test reduction

• Authors: Hervé Deshayes
• Venue: ITC '98 Proceedings of the 1998 IEEE International Test Conference
• Year: 1998

IC manufacturers are engaged in a continuous process ofcomplexity increase (Moore's law) and at the same time ofprice decrease 驴 not to forget the search for quality.The cost aspect is particularly important formicrocontroller (MCU) manufacturers, since these devicesare produced in volume, and are used in cost-sensitiveequipment (automotive, appliances, toys驴). This is whySTMicroelectronics has used a lot effort to obtain a Cost ofTest reduction.The purpose of this paper is to present the processSTMicroelectronics implemented to establish the Cost ofTest of their devices, compute its value, analyze it andfrom there achieve a drastic reduction of this Cost.This study has been realized within the ESPRIT SEA(Semiconductor Equipment Assessment) program. Itcombined Schlumberger-Automatic Test Equipment andTemic-MHS around STMicroelectronics to form theCOTRED (Cost Of Test Reduction) project.This paper will present:the major items STMicroelectronics have chosen toinclude in the expenditure;how the number of devices tested was evaluated, andhow the throughput was computed;the test constraints specific to STMicroelectronicsmicrocontrollers;the influence of major parameters of Cost of Test, froma graphical analysis of sensitivity, produced usingACOLYTE © , a Schlumberger proprietary tool;the issues pertaining specifically to parallel 1 test (e.g.programming, probe cards, system resourceutilization);the limits that have to be expected to the benefits ofparallel test;the side benefits of a flexible parallel test solution (suchas the optimization of the investment, the capitalexpense growth reduction);the solutions implemented by STMicroelectronics; andfinally,the COT gain that has been achieved by thisimplementation.