SOSP '91 Proceedings of the thirteenth ACM symposium on Operating systems principles
IEEE INFOCOM '92 Proceedings of the eleventh annual joint conference of the IEEE computer and communications societies on One world through communications (Vol. 2)
Evaluating the performance of cache-affinity scheduling in shared-memory multiprocessors
Journal of Parallel and Distributed Computing
Thread scheduling for cache locality
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
A hierarchial CPU scheduler for multimedia operating systems
OSDI '96 Proceedings of the second USENIX symposium on Operating systems design and implementation
Hierarchical packet fair queueing algorithms
Conference proceedings on Applications, technologies, architectures, and protocols for computer communications
Start-time fair queueing: a scheduling algorithm for integrated services packet switching networks
Conference proceedings on Applications, technologies, architectures, and protocols for computer communications
Rate-proportional servers: a design methodology for fair queueing algorithms
IEEE/ACM Transactions on Networking (TON)
Expressing meaningful processing requirements among heterogeneous nodes in an active network
Proceedings of the 2nd international workshop on Software and performance
Scheduling computations on a software-based router
Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Fair queuing for aggregated multiple links
Proceedings of the 2001 conference on Applications, technologies, architectures, and protocols for computer communications
Using Processor-Cache Affinity Information in Shared-Memory Multiprocessor Scheduling
IEEE Transactions on Parallel and Distributed Systems
Design of a Gigabit ATM Switch
INFOCOM '97 Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
CommBench-a telecommunications benchmark for network processors
ISPASS '00 Proceedings of the 2000 IEEE International Symposium on Performance Analysis of Systems and Software
WF2Q: worst-case fair weighted fair queueing
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
The effectiveness of affinity-based scheduling in multiprocessor networking
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
A scalable high-performance active network node
IEEE Network: The Magazine of Global Internetworking
Considering processing cost in network simulations
MoMeTools '03 Proceedings of the ACM SIGCOMM workshop on Models, methods and tools for reproducible network research
MultiLayer processing - an execution model for parallel stateful packet processing
Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Replication-based partial dynamic scheduling on heterogeneous network processors
APPT'07 Proceedings of the 7th international conference on Advanced parallel processing technologies
Providing performance guarantees in multipass network processors
IEEE/ACM Transactions on Networking (TON)
FIFO queueing policies for packets with heterogeneous processing
MedAlg'12 Proceedings of the First Mediterranean conference on Design and Analysis of Algorithms
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To provide flexibility in deploying new protocols and services, general-purpose processing engines are being placed in the datapath of routers. Such network processors (NPs) are typically simple RISC multiprocessors that perform forwarding and custom application processing of packets. The inherent unpredictability of execution time of arbitrary instruction code poses a significant challenge in providing service guarantees for data flows that compete for such processing resources in the network. However, we show that network processing workloads are highly regular and predictable, which can be exploited for scheduling purposes. We present two such predictive processor scheduling algorithms that aim at providing service guarantees as well as improving the performance of the NP by increasing the instruction data locality. Simulation results show that these algorithms provide significantly better performance than processor scheduling algorithms that do not take packet processing times into consideration.