Power analysis: attacks and countermeasures

  • Authors:
  • Suresh Chari;Charanjit S. Jutla;Josyula R. Rao;Pankaj Rohatgi

  • Affiliations:
  • IBM Research, T.J. Watson Research Center, P.O. Box 714, Yorktown Heights, New York;IBM Researcch, T.J. Watson Research Center, P.O. Box 714, Yorktown Heights, New York;IBM Research, T.J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York;IBM Research, T.J. Watson Research Center, P.O. Box 714 Yorktown Heights, New York

  • Venue:
  • Programming methodology
  • Year:
  • 2003

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Abstract

Side channel cryptanalytic techniques, such as the analysis of instantaneous power consumption, have been extremely effective in attacking cryptographic implementations on simple hardware platforms. The significant economic ramifications of such attacks, especially on the smart card market, have spurred a scramble for countermeasures. Unfortunately, most of the proposed countermeasures are ad hoc and ineffective. This is largely due to the absence of a sound scientific basis for understanding side channel information leakage resulting in the lack of a methodology for designing and validating proposed countermeasures.A more scientific approach to the problem is to create a model for the power consumption characteristics of the device, and then design implementations that are provably secure in that model, i.e. they resist generic attacks with an a priori bound on the number of experiments. We propose such a model for power consumption and a generic programming technique to create provably secure implementations. We expect that this formal model will become the basis for further work in this area.