I-structures: data structures for parallel computing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Multithreading: a revisionist view of dataflow architectures
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Machines and models for parallel computing
International Journal of Parallel Programming
Simultaneous multithreading: maximizing on-chip parallelism
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Segmentation and the Design of Multiprogrammed Computer Systems
Journal of the ACM (JACM)
Monsoon: an explicit token-store architecture
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Communications of the ACM
Communications of the ACM
On the criteria to be used in decomposing systems into modules
Communications of the ACM
Programming semantics for multiprogrammed computations
Communications of the ACM
Inside the as/400
An instruction set and microarchitecture for instruction level distributed processing
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
The Java Language Specification
The Java Language Specification
An Operational Semantics for a Language with Early Completion Data Structures
Proceedings of the International Colloquium on Formalization of Programming Concepts
A language design for structured concurrency
Proceedings of the DoD Sponsored Workshop on Design and Implementation of Programming Languages
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
A Parallel Program Execution Model Supporting Modular Software Construction
MPPM '97 Proceedings of the Conference on Massively Parallel Programming Models
General Parallel Computation can be Performed with a Cycle-Free Heap
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
SOSP '69 Proceedings of the second symposium on Operating systems principles
Experiments with the Fresh Breeze tree-based memory model
Computer Science - Research and Development
Massively parallel breadth first search using a tree-structured memory model
Proceedings of the 2012 International Workshop on Programming Models and Applications for Multicores and Manycores
HICAMP: architectural support for efficient concurrency-safe shared structured data access
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Compiling Fresh Breeze Codelets
Proceedings of Programming Models and Applications on Multicores and Manycores
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It is well-known that multiprocessor systems are vastly more difficult to program than systems that support sequential programming models. In a 1998 paper[11] this author argued that six important principles for supporting modular software construction are often violated by the architectures proposed for multiprocessor computer systems. The Fresh Breeze project concerns the architecture and design of a multiprocessor chip that can achieve superior performance while honoring these six principles.The envisioned multiprocessor chip will incorporate three ideas that are significant departures from mainstream thinking about multiprocessor architecture: (1) Simultaneous multithreading has been shown to have performance advantages relative to contemporary superscalar designs. This advantage can be exploited through use of a programming model that exposes parallelism in the form of multiple threads of computation. (2) The value of a shared address space is widely appreciated. Through the use of 64-bit pointers, the conventional distinction between "memory" and the file system can be abolished. This can provide a superior execution environment in support of program modularity and software reuse, as well as supporting multi-user data protection and security that is consistent with modular software structure. (3) No memory update; cycle-free heap. Data items are created, used, and released, but never modified once created. The allocation, release, and garbage collection of fixed-size chunks of memory will be implemented by efficient hardware mechanisms. A major benefit of this choice is that the multiprocessor cache coherence problem vanishes: any object retrieved from the memory system is immutable. In addition, it is easy to prevent the formation of pointer cycles, simplifying the design of memory management support.