A new method to express functional permissibilities for LUT based FPGAs and its applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Implementation and use of SPFDs in optimizing Boolean networks
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Logic Synthesis and Verification
Logic Synthesis and Verification
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Information Relationships and Measures in Application to Logic Design
ISMVL '99 Proceedings of the Twenty Ninth IEEE International Symposium on Multiple-Valued Logic
Information Theory Method for Flexible Network Synthesis
ISMVL '01 Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic
Henkin quantifiers and boolean formulae
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
Henkin quantifiers and Boolean formulae: A certification perspective of DQBF
Theoretical Computer Science
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SPFDs, a mechanism for expressing flexibility during logic synthesis, were first introduced for FPGA synthesis. They were then extended to general, combinational Boolean networks and later the concept of sequential SPFDs was introduced. In this paper, we explore the idea of using SPFDs for functional decomposition. A new type of functional decomposition called topologically constrained decomposition is introduced. An algorithm is provided for solving this problem using SPFDs. Preliminary experimental results are encouraging and indicate the feasibility of the approach. A scheme is also presented for generating instances of the topologically constrained decomposition problem.