IEEE standard 1149.1-1990 on boundary scan: history, literature survey, and current status
Journal of Electronic Testing: Theory and Applications
Distributed Diagnosis Algorithms for Regular Interconnected Structures
IEEE Transactions on Computers
The network architecture of the Connection Machine CM-5 (extended abstract)
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
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In this paper, we present a test structure for identifying faulty processing or switching nodes in massively parallel processing systems. The structure does not require any precomputed and stored responses. It is based on group probing and leads to a high test performance by exploiting parallelism in testing. Once a fault is detected, the expected response is obtained by finding a dominant group of nodes producing an identical response. The response from the dominant group is then broadcast to all the nodes under test to determine their fault status by a local comparison. The technique can be used to test identical chips or processing nodes regardless of how the test vectors are generated.