ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Efficient performance analysis of asynchronous systems based on periodicity
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Performance estimation and slack matching for pipelined asynchronous architectures with choice
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
High performance asynchronous design flow using a novel static performance analysis method
Computers and Electrical Engineering
Process variation-aware performance analysis of asynchronous circuits
Microelectronics Journal
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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This paper shows that self-timed meshes can achieve linear speed-up. The per-processor performance of a mesh is the average number of operations per processor per unit time. For synchronous processors, it has been shown that the per-processor performance of a mesh goes to zero as the size of the mesh goes to infinity. This paper shows that for self-timed meshes, the per-processor performance can be bounded below by a positive constant. Thus, self-timed meshes are asymptotically faster than synchronous ones. Furthermore, simulation and analytic results are used to show that analysis based solely on average case times can be optimistic and leads to poor design decisions.