A New Fast Discrete Fourier Transform
Journal of VLSI Signal Processing Systems
Randomized Algorithms: A System-Level, Poly-Time Analysis of Robust Computation
IEEE Transactions on Computers
50 years of CORDIC: algorithms, architectures, and applications
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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This paper describes DCT (IDCT) computations using the CORDIC algorithm. By rewriting the DCT, for a 1*8 DCT only 6 CORDIC computations are needed, whereas a 1*16 DCT requires 22 CORDIC computations. But these can all be pipelined through a single CORDIC unit, so 16*16 DCT's becomes feasible for HDTV compression. Only some simple adders, registers and a more complicated carry look-ahead adder are needed, and the computing speed can be very high. Limited only by the delay of a carry look-ahead adder, the delay time of the pipelined structure is 2-10ns and the data rate is 100-500MHz for an 8*8 DCT/IDCT and 72.2-366.6MHz for a 16*16 DCT/IDCT when using two units.