Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition

  • Authors:

  • Dhananjay S. Phatak;I. Koren

  • Affiliations:

  • -;-

  • Venue:
  • ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
  • Year:
  • 1999

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Abstract

Advances in computer hardware often have little impact until they become accessible to programmers using high-level languages. For example, the IEEE floating-point arithmetic standard provides various rounding modes and exceptions, but it is difficult ...