Wiring considerations in analog VLSI systems, with application to field-programmable networks
Wiring considerations in analog VLSI systems, with application to field-programmable networks
Visual representations of speech signals
Visual representations of speech signals
Speech Recognition Experiments with Silicon Auditory Models
Analog Integrated Circuits and Signal Processing
Controlling bipedal movement using optic flow
Optic flow and beyond
Network-on-Chip Architectures for Neural Networks
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Scalable network-on-chip architecture for configurable neural networks
Microprocessors & Microsystems
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The address-event representation (AER) is an asynchronous point-to-point communications protocol for silicon neural systems. This paper describes an extension of the AER protocol that allows multiple AER senders to share a common bus. A fully-functional silicon implementation of the extended protocol is described, as well as a functional board-level system of several of these chips sharing a common bus.