Real-time Scheduling in Heterogeneous Dual-core Architectures
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Next generation embedded systems will demand applications with increasing complexity, that a standard uniprocessor microcontroller architecture will likely be unsuited to support. A possible solution to cope with embedded applications with high computational requirementsis to adopt multiple-processor-on-a-chip architectures.This paper discusses the problem of multiprocessor scheduling for asymmetric architectures composed by a general purpose CPU and a DSP. The challenging issue addressed in this work is to verify whether the use of a dedicated processor can effectively enhance the performance of an embedded system still maintaining some kind of real-time guarantee. In particular, we provide a method for increasing the schedulability bound in theconsidered architecture, allowing a more efficient use of the computational resources.