A flexible topology selection program as part of an analog synthesis system

Authors:
P. Veselinovic;D. Leenaerts;W. van Bokhoven;F. Leyn;F. Proesmans;G. Gielen;W. Sansen
Affiliations:
Eindhoven University of Technology, Dept. of Electrical Engineering, EEB, P.O.Box 513, 5600 MB Eindhoven, The Netherlands;Eindhoven University of Technology, Dept. of Electrical Engineering, EEB, P.O.Box 513, 5600 MB Eindhoven, The Netherlands;Eindhoven University of Technology, Dept. of Electrical Engineering, EEB, P.O.Box 513, 5600 MB Eindhoven, The Netherlands;Katholieke Universiteit Leuven, Dept. of Electrical Engineering, ESAT-MICAS, Kardinaal Mercierlaan 94, B-3001 Heverlee, Belgium;Katholieke Universiteit Leuven, Dept. of Electrical Engineering, ESAT-MICAS, Kardinaal Mercierlaan 94, B-3001 Heverlee, Belgium;Katholieke Universiteit Leuven, Dept. of Electrical Engineering, ESAT-MICAS, Kardinaal Mercierlaan 94, B-3001 Heverlee, Belgium;Katholieke Universiteit Leuven, Dept. of Electrical Engineering, ESAT-MICAS, Kardinaal Mercierlaan 94, B-3001 Heverlee, Belgium
Venue:
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Year:
1995

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Abstract

The task of a topology selector within an analog synthesis system is to find the best available analog circuit topology out of a library for a given set of input specification. The proposed selection method consists of a combination of two approaches: procedural filtering and rule-based filtering. The procedural filtering consists of two consecutive phases based on boundary checking and interval analysis. Such a combination of different sorts of filtering is a new technique that allows an optimal trade-off between selection accuracy and required selection time. The tool that implements the method is technology independent and fully open towards newly added design knowledge.