A Dedicated Image Processor Exploiting both Spatial and Instruction-Level Parallelism

  • Authors:

  • Alberto Broggi;Massimo Bertozzi;Gianni Conte;Francesco Gregoretti;Roberto Passerone;Claudio Sansoe;Leonardo M. Reyneri

  • Affiliations:

  • -;-;-;-;-;-;-

  • Venue:
  • CAMP '97 Proceedings of the 1997 Computer Architectures for Machine Perception (CAMP '97)
  • Year:
  • 1997

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Abstract

This paper presents the PAPRICA-3 massively parallel SIMD system, designed as a hardware accelerator for real-time image processing tasks. It is composed of a linear array of single-bit processing elements, including a fairly complex pipelined controller, thus allowing the system to take advantage also of the intrinsic parallelism in a program. A programming environment has been developed to ease the prototyping of applications: a code generator converts C++ programs into assembly, and code optimization is performed directly at the assembly level, following a genetic approach. The effectiveness of the processor, as well as of the code optimizer, are discussed with the aid of an application example for handwritten character recognition.