High Speed Target Tracking Vision Chip

  • Authors:

  • T. Komuro;I. Ishii;M. Ishikawa;A. Yoshida

  • Affiliations:

  • -;-;-;-

  • Venue:
  • CAMP '00 Proceedings of the Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)
  • Year:
  • 2000

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Abstract

This paper describes a new vision chip architecture for high speed target tracking. The system speed and pixel size improved by hardware implementation of a special algorithm which utilizes a property of high speed vision. Using an asynchronous and bit-serial propagation method, global moments of the image are calculated at high speed and with small circuits. Based on the new architecture a 64/spl times/64 pixel prototype chip has been developed.