VLSI Architectures for Computing Multiplications and Inverses in GF(2m)
IEEE Transactions on Computers
An End-to-End Systems Approach to Elliptic Curve Cryptography
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Hardware architectures for public key cryptography
Integration, the VLSI Journal
An FPGA implementation of an elliptic curve processor GF(2m)
Proceedings of the 14th ACM Great Lakes symposium on VLSI
High-performance public-key cryptoprocessor for wireless mobile applications
Mobile Networks and Applications
| Hi-index | 0.00 |
A compact fast elliptic curve cryptosystem coprocessor with variable key size is implemented with a Xilinx FPGA. This implementation utilizes the internal SRAM/registers of the FPGA and has the whole system implemented within a single FPGA chip. The compact design helps reduce the overhead and limitations associated with data transfer between FPGA and host, and thus leads to high performance. The experimental data shows that the carefully constructed hardware architecture is regular and has high CLB utilization.