Configuration caching vs data caching for striped FPGAs
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Garp: a MIPS processor with a reconfigurable coprocessor
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
RMB -- A Reconfigurable Multiple Bus Network
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
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The number of transistors on chip has dramatically increased within the last decade. A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not need all the caches for storage. In addition, some applications have embedded computations with a regular structure. The behavior of the applications is static, which implies that a specialized function unit could be beneficial for the application. This presents an opportunity to explore the use of a part of a cache for performing these regular computations. In this paper, we show one such design to convert a cache into a function unit to improve the performance of an application. A reconfigurable cache takes less area than the area of a cache and a function unit together and imposes no time overhead. In order to convert a cache memory to a function unit, we mapped multi-bit output LUTs into the cache structure. Therefore, the cache can perform computations when it is reconfigured as a function unit.