Queue Management in Network Processors
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
A methodology for evaluating runtime support in network processors
Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems
Design of a network service processing platform for data path customization
Proceedings of the 2nd ACM SIGCOMM workshop on Programmable routers for extensible services of tomorrow
An on-demand queue management architecture for a programmable traffic manager
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Network processor is a kind of programmable processor performing network computing with special design and optimization. It can be viewed as a tight-coupled multiprocessor system due to its architecture of multiple in-chip processors, high-speed buses and other function components. The design and development of networking systems using network processors is an emerging field that offers numerous challenges and opportunities. This paper provides the design and implementation of queue management module combining buffer management and packet scheduling for QoS provision, which uses Intel's network processor and follows the relative differentiated service model. As the key issues, system synchronization, task assignment to threads and design difficulties are discussed in the paper.