A Family of Variable-Precision Interval Arithmetic Processors
IEEE Transactions on Computers
Dual-mode floating-point multiplier architectures with parallel operations
Journal of Systems Architecture: the EUROMICRO Journal
A monte-carlo floating-point unit for self-validating arithmetic
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
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Interval arithmetic provides an efficient method for monitoring and controlling errors in numerical calculations. However, existing software packages for interval arithmetic are often too slow for numerically intensive computations. This paper presents the design of a multiplier that performs either interval or floating point multiplication. This multiplier requires only slightly more area and delay than a conventional floating point multiplier, and is one to two orders of magnitude faster than software implementations of interval multiplication.