Comparing HOL and MDG: a case study on the verification of an ATM switch fabric
Nordic Journal of Computing
Three Approaches to Hardware Verification: HOL, MDG and VIS Compared
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Hardware Verification Using Co-induction in COQ
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
| Hi-index | 0.00 |
In this paper we present several practical methods for formally verifying an Asynchronous Transfer Mode (ATM) network switching fabric using the Verification Interacting with Synthesis (VIS) tool. We produced Verilog RTL behavioral and netlist structural descriptions of the switch fabric at different levels of hierarchy and established several abstracted models of the fabric. Using various techniques presented in the paper, we provided a number of relevant liveness and safety properties expressible in CTL, and accomplished their verification in reasonable CPU time. Moreover, we performed equivalence checking between the structural and behavioral descriptions of each submodule of the implementation hierarchy.