A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
A fault simulation methodology for VLSI
DAC '82 Proceedings of the 19th Design Automation Conference
Speed and accuracy in digital network simulation based on structural modeling
DAC '82 Proceedings of the 19th Design Automation Conference
Transmission gate modeling in an existing three-value simulator
DAC '82 Proceedings of the 19th Design Automation Conference
Switch-level simulation of VLSI using a special-purpose data-driven computer
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A VHDL Standard Package for Logic Modeling
IEEE Design & Test
Design to test migration: a tester and a simulator
EURO-DAC '90 Proceedings of the conference on European design automation
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To simulate tri-state logic in a non-pessimistic way, a six valued algebra is shown to be necessary. This is then extended to quin-state logic (strong 0, strong 1, weak 0, weak 1, high impedance) and a fifteen valued algebra. The improved accuracy is as important for fault simulation as for design verification. The requirements for non-pessimistic test generation algebras for tri-state and quin-state logic are also discussed. Pessimism in test generation increases the search space and hence the run time.