An architecture for extended abstract data flow

  • Authors:
  • Vason P. Srini

  • Affiliations:
  • -

  • Venue:
  • ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
  • Year:
  • 1981

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Abstract

A distributed computer system environment for executing extended abstract data flow graphs (EDFGs) is presented. Sequencing functions in EDFGs depends on the availability of data. Since the functions are free of side effects, unrelated functions can be executed in parallel if the required data is available. The environment comprises an organization of conventional or data flow processors and the kernel functions of a distributed operating system. The processors are organized in groups, or levels. Each level is for executing the unrelated functions, or nodes, of EDFGs that are at a certain path length. Each node of an EDFG executes on a processor except when the node is to be replaced by a graph. The processors need not be identical in terms of physical characteristics. For each level of processors there is a memory unit, called level-i memory, with which the processors communicate. There is also a system memory with which all the levels can communicate. The system memory is a tagged memory containing data that can be useful to several levels. The communication between processors and other components is asynchronous, using an abstract data flow protocol. This asynchronous communication is supported by a message switcher. Each level has interconnection networks for connecting processors at that level, for processors and the level-i memory unit, and for processors and the system memory unit. The processors at each level are partitioned into two domains so that operating system programs and application programs can be simultaneously executed. The processors in the problem domain are called application processors (APs); those in the supervisor domain are called supervisor processors (SPs). Two classes of interconnection networks for connecting processors in level i are discussed. The first class of interconnection networks is intended for situations where any healthy processor can be designated as AP or SP. The second class of interconnection networks is intended for situations where only a subset of the processors can be used as APs. The rest of the processors are intended for SPs. The execution of EDFGs on the above organization of processors requires an operating system to map nodes in EDFGs to processors, to assure smooth flow of data into and out of processors, to measure performance, and to diagnose faults. The kernel functions of a distributed operating system are presented. The kernel functions are replicated for each level of processors to facilitate the autonomous functioning of processors in each level and cooperation with other levels using the abstract data flow protocol. The communication between the kernel functions is also asynchronous, using the abstract data flow protocol.