Hardware algorithms for nonnumeric computation

  • Authors:
  • Amar Mukhopadhyay

  • Affiliations:
  • -

  • Venue:
  • ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
  • Year:
  • 1978

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Abstract

This paper is concerned with the design of hardware algorithms for nonnumeric computation. The subset of nonnumeric operations considered is derived from string processing languages such as SNOBOL or high-level data base languages used in data base management architectures. It is shown that cellular hardware can be designed to perform these operations on-line while the data is accessed from a rotating secondary storage medium. Being uniformly structured, the hardware could be implemented using LSI technology yielding an estimated pattern matching rate of about 100 million characters/sec. The proposed nonnumeric processor will find applications in the environment of parallel (or associative) data base management architecture, processing of large unstructured textual files, as a stand-alone microprocessor in digital communications which need simple search and update operations, or as a nonnumeric CPU that can be used along with the conventional CPU to expedite string processing operations.