Design and implementation of a non-binary code for byte-organized memory with binary and quaternary logics

  • Authors:

  • Tich T. Dao

  • Affiliations:

  • -

  • Venue:
  • MVL '78 Proceedings of the eighth international symposium on Multiple-valued logic
  • Year:
  • 1978

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Abstract

Byte-organized memory requires an error control scheme which can handle errors involving one or several entire bytes. A special parallel non-binary single error correction and double error detection SEC-DED block code is constructed by an iterative technique. This code is optimum in the sense that it lends itself to a simple and high speed hardware implementation either in binary or in quaternary logic. A double extension field GF(22m) of the subfield GF(2m) is then introduced. As a design example a (80,64) SED-DED code in GF(24) is constructed and implemented.