Error-correcting codes for semiconductor memory applications: a state-of-the-art review

  • Authors:
  • C. L. Chen;M. Y. Hsiao

  • Affiliations:
  • IBM Data Systems Division, Poughkeepsie, New York;IBM Data Systems Division, Poughkeepsie, New York

  • Venue:
  • IBM Journal of Research and Development
  • Year:
  • 1984

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Abstract

This paper presents a state-of-the-art review of error-correcting codes for computer semiconductor memory applications. The construction of four classes of error-correcting codes appropriate for semiconductor memory designs is described, and for each class of codes the number of check bits required for commonly used data lengths is provided. The implementation aspects of error correction and error detection are also discussed, and certain algorithms useful in extending the error-correcting capability for the correction of soft errors such as α-particle-induced errors are examined in some detail.