A case for redundant arrays of inexpensive disks (RAID)
SIGMOD '88 Proceedings of the 1988 ACM SIGMOD international conference on Management of data
Error-correcting codes for semiconductor memory applications: a state-of-the-art review
IBM Journal of Research and Development
IBM zEnterprise 196 microprocessor and cache subsystem
IBM Journal of Research and Development
Server-class DDR3 SDRAM memory buffer chip
IBM Journal of Research and Development
IBM zEnterprise 196 microprocessor and cache subsystem
IBM Journal of Research and Development
Server-class DDR3 SDRAM memory buffer chip
IBM Journal of Research and Development
IBM Journal of Research and Development
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The IBM zEnterprise® system introduced a new and innovative redundant array of independent memory (RAIM) subsystem design as a standard feature on all zEnterprise servers. It protects the server from single-channel errors such as sudden control, bus, buffer, and massive dynamic RAM (DRAM) failures, thus achieving the highest System z® memory availability. This system also introduced innovations such as DRAM and channel marking, as well as a novel dynamic cyclic redundancy code channel marking. This paper describes this RAIM subsystem and other reliability, availability, and serviceability features, including automatic channel error recovery; data and clock interface lane calibration, recovery, and repair; intermittent lane sparing; and specialty engines for maintenance, periodic calibration, power, and power-on controls.